CVE WatchSep 29, 2026

CVE-2025-31936

Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processors when using Intel(R) TDX within SMM may a

CVSS

5.7

Medium

EPSS

0.1%

KEV

—

Exploit Today

0-100

Published: Aug 11, 2026 · Last modified: Sep 29, 2026 · CWE-1260

EPSS · 30d

0.1%EPSS · 30 days0.1%

2026-09-222026-10-20

Technical description

Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processors when using Intel(R) TDX within SMM may allow an escalation of privilege. SMM adversary with a privileged user combined with a high complexity attack may enable escalation of privilege. This result may potentially occur via local access when attack requirements are present with special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (high), integrity (high) and availability (none) of the vulnerable system, resulting in subsequent system confidentiality (none), integrity (none) and availability (none) impacts.

Official references

intel.comhttps://intel.com/content/www/us/en/security-center/advisory/intel-sa-01379.html

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